Avinash Karanth Kodi Assistant Professor Department of Electrical Engineering and Computer Science Russ College of Engineering and Technology Ohio University 322D Stocker Center Athens, OH 45701 Office: STKR 322D Tel: (740)-597-1481 Fax: (740)-593-0007 E-mail: kodi [at] ohio [dot] edu

Ph.D. Electrical and Computer Engineering, 2006
The University of Arizona, Tucson, Arizona

M.S. Electrical and Computer Engineering, 2003
The University of Arizona, Tucson, Arizona 

B.E. Electronics and Communications, 2000
Manipal Institute of Technology, Mangalore University, India 

Fall 2009: EE 461A Digital Systems and Computer Design

Fall 2009: EE 102 Introduction to Computer Engineering

• Computer Architecture & Parallel Processing
• Optical Interconnects for High-Performance Computing (HPC)
• Chip Multiprocessors (CMPs)
• Network-on-Chips (NoCs)

Avinash Karanth Kodi and Ahmed Louri
Multi-dimension and Reconfigurable Optical Interconnects for High-Performance Computing (HPC) Systems  [PDF]
IEEE Journal of Lightwave Technology, vol. 27, no. 21, pp. 4634-4641, November 2009. 

Avinash Karanth Kodi and Randy Morris
Design of a Scalable Nanophotonic Interconnect for Multicores  [PDF]
Accepted for publication, ACM/IEEE Sympoisum on Architectures for Networking and Communications Systems
(ANCS'09), Princeton, New Jersey, Oct 19-20, 2009. [Acceptance Rate ~ 23%]

Avinash Karanth Kodi and Ahmed Louri
Reconfigurable and Adaptive Photonic Networks for High-Performance Computing (HPC) Systems  [PDF]
OSA Applied Optics, Special issue on Optical High-Performance Computing, vol. 48, no. 22, August 2009. 

Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri and Janet Wang
Adaptive Inter-Router Links for Low-Power, Area-Efficient and Reliable Network-on-Chip (NoC) Architectures [PDF]
14th Asia and South Pacific Design Automation Conference (ASP-DAC'09), Yokohama, Japan, pp. 1-6, January 19-22, 2009. 
[Acceptance Rate ~ 30%, Best Paper Candidate]

Avinash Karanth Kodi, Ashwini Sarathy and Ahmed Louri
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis [PDF]
IEEE Transactions on Computers , vol. 57, no. 9, pp. 1169 - 1181, September 2008.

Avinash Karanth Kodi, Ashwini Sarathy and Ahmed Louri
iDEAL: Inter-Router Dual-function Energy and Area-efficient Links for Network-on-Chip (NoC) Architectures [PDF]
Proceedings of the 35th International Symposium on Computer Architecture (ISCA'08), Beijing, China, pp. 241-250, June 21-25, 2008.
[Acceptance Rate ~ 14%]